Hardware Design for FPGAs

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Hardware Design for FPGAs

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FPGA based design covers practical aspects of FPGA Based Design. This class introduces register transfer level (RTL) designing and Verilog modeling of RTL level designs. In addition to that, methods for thorough verification of RTL designs are covered. This completes basic skills in hardware design using Verilog. The next step is synthesizing the Verilog code for specific FPGA platforms. Systematic modeling of Top-level Architecture, explicit use of FPGA specific components and the issues like meeting Timing constraints and Area constraints are covered. The course is designed to complement theoretical knowledge with practical needs of modern digital systems.

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