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Renzym Education

Renzym Education
We intend to upload videos covering various courses as well as tutorials on applying theory in practice. Most of these videos are collaborative work of Abasyn University Islamabad Campus and RENZYM.

Facebook: https://www.facebook.com/renzymeducation
Abasyn Islamabad: http://www.abasynisb.edu.pk

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Renzym Education

Renzym Education

Renzym Education

3 days ago

Renzym Education
After a long break, I am teaching a course "Computer Architecture". Although I have already uploaded Computer Architecture course, and the content would probably overlap 80-90% with previous offering. But I am uploading because of two reasons:1- Its a spring course instead of summer course and for BS students, which means 1.5 hrs lectures instead of 3 hrs which allows covering more things in the course (Overall time is same but in 3 hrs class gets saturated) .2- I am covering SystemVerilog (more from synthesis perspective and a bit of simulation, not UVM) as well in the course which I haven’t covered earlier. Also I intend to focus a bit more on RISCV in this offering than previous ones. So far 3 lectures have been uploaded. First couple of lectures were review of logic design followed by first lecture on SystemVerilog. Sharing here for any self paced learners who want to follow along … See MoreSee Less

Mux, Demux, Comparator, Logic design review and course Intro, Computer Architecture Lec 01 / 28

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Topics Covered:(0:00) Introduction to the course(6:30) Course plan(23:25) Logic Gates(32:45) Circuit for any truth table(50:46) Mux (Multiplexer)(1:00:38) De…

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Renzym Education

1 years ago

Renzym Education
This is Urdu version of a video that I already made in English (English version: youtu.be/OkQdJBpflr8 ). In the video I tried to simplify understanding of complex numbers, imaginary numbers and Eular’s formula in a way typically not covered in standard texts. I had some unanswered questions about imaginary numbers since a couple of decades. During covid days I spent some time and answered those that led to the original video.While teaching my kids I realized that there should be an Urdu version too so I made this one (Matric maths text books don’t provide any visual understanding). Feel free to share.www.youtube.com/watch?v=TU7D-iivCoY … See MoreSee Less

Complex numbers tutorial [Urdu/Hindi]

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#imaginarynumber #complexnumbers #eularEnglish version: youtu.be/OkQdJBpflr8In this video I tried to simplify understanding of complex numbers, imagi…

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Renzym Education

2 years ago

Renzym Education
𝐅𝐢𝐫𝐬𝐭 𝐯𝐢𝐝𝐞𝐨 𝐭𝐨 𝐜𝐫𝐨𝐬𝐬 100𝐊 𝐯𝐢𝐞𝐰𝐬 𝐨𝐧 𝐦𝐲 𝐲𝐨𝐮𝐭𝐮𝐛𝐞 𝐜𝐡𝐚𝐧𝐧𝐞𝐥. Took about 2 years in doing so, organically.The back story is that when we started Renzym, HW training was planned to be one of our business directions. So I prepared these slides for that, but due to existing projects we only conducted the training a couple of times.I started using those slides in logic design course, and during COVID days I created different sections. I stiched those into a single video that can get people started in Verilog in a short span. Since then, I have been using it to train people during internships and training period at Renzym. And I hope the other 100K have somewhat benefitted from it too.It does not require any prerequisites as such. So anyone wanting to explore the field of HW design can peek and try out.This was also the first major content that I converted to English on my channel to spread it to a wider audience. I created a few more and have plans to convert more of existing content (e.g. Zynq training, that internees/trainees follow up next) into English if/when time allows (So do subscribe and press the bell icon 😉 ).Thanks for watching and feel free to share. Humbled.www.youtube.com/watch?v=nblGw37Fv8A … See MoreSee Less

Verilog in 2 hours [English]

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#verilog This tutorial provides an overview of the Verilog HDL (hardware description language) and its use in programmable logic design. We cover logic desig…

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Renzym Education

2 years ago

Renzym Education
This is a complete computer architecture course in Urud/Hindi which covers most of the content from freely available UC Berkeley’s computer architecture course slides.On Eid holidays, I decided to spend a few hours on a couple of my existing playlists to remove redundancies in videos and join them to have a single video. Well, few hours took up all the holidays, but in the end I was able to cut down a 22 hours playlist into a 12 hours video.One of the motivations was that there has been a lot of work lately in RISCV based processors, but engineers often have holes in their understanding. I could not find a resource that could do it minimum time, so I thought to create one. I intended to keep it to 5-6 hours, but there were so many topics that it ended up to 12 hours divided into six sections:1. Single Cycle Processor (~1 hr)2. Pipelining and Branch prediction ( ~2 hrs)3. Memory (Caches and VM) ( ~3 hrs)4. Complex Pipelines ( ~2 hrs)5. VLIW, Multithreading, Vector processors ( ~2 hrs)6. Synchronization and Cache Coherence ( ~2 hrs)Feel free to share.#computerarchitecture #RISCVwww.youtube.com/watch?v=jWlapNQRgck … See MoreSee Less

Computer Architecture Crash Course

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Reference:Most of lecture material is derived from freely available course i.e. UC Berkeley course CS 152https://inst.eecs.berkeley.edu/~cs152/sp12/(0:00) In…

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Topics Covered: (00:01) Last lecture Review (07:30) Priority and Unique case (16:50) Register, Posedge, Blocking/Non-Blocking Assignment (27:23) Adder, Subtractor, Multiplier (29:20) Declarations (31:02) Coding steps (37:40) Verilog Coding Example: Counter (47:00) Arrays (56:51) Verilog Simulation/Testing/Verification (1:03:40) Clock Generation, Initial block, Forever loop (1:07:01) Main Simulation, Delays using # and @(posedge clk) (1:15:21) Verilator intro and example SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
SystemVerilog Coding, Register, Adder, Multiplier, Verification, Computer Architecture Lec 03 / 30
Topics Covered: (0:00) Intro (8:40) Registers, Mux, Demux (12:49) Register file example (31:08) Decrementer Example (41:11) Four Deep FIFO design Example (52:31) SystemVerilog Coding: Module,4 (58:15) Module Instantiation (1:03:31) Gates, (1:09:32) Multiplexers/Mux, Data values (1:14:31) Demultiplexer/Demux, Concatenation SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
SystemVerilog – Modules, Gates, Mux, Demux, FIFO Example, Computer Architecture Lec 03 / 28
Topics Covered: (0:00) Adder (17:52) Subtractor (31:47) Multiplier (45:56) Flip flops (1:10:26) Review of logic design review SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
Adder, Multiplier, Flip flop, Logic design review, Computer Architecture Lec 02 / 28
Topics Covered: (0:00) Introduction to the course (6:30) Course plan (23:25) Logic Gates (32:45) Circuit for any truth table (50:46) Mux (Multiplexer) (1:00:38) Demux (Demultiplexer) (1:04:46) Comparators SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
Mux, Demux, Comparator, Logic design review and course Intro, Computer Architecture Lec 01 / 28
#imaginarynumber #complexnumbers #eular English version: https://youtu.be/OkQdJBpflr8 In this video I tried to simplify understanding of complex numbers, imaginary numbers and Eular's formula. Slides and matlab/octave code for plots: https://tinyurl.com/cmplxnos Some useful links I mentioned in talk Real Imaginative Guide to Complex Numbers: https://wirelesspi.com/a-real-imaginative-guide-to-complex-numbers/ A Quadrature Signals Tutorial: https://www.dsprelated.com/showarticle/192.php Welch Labs - Imaginary numbers are real: https://www.youtube.com/watch?v=T647CGsuOVU&list=PLiaHhY2iBX9g6KIvZ_703G3KJXapKkNaF 3Blue1Brown - Taylor Series: https://www.youtube.com/watch?v=3d6DsjIBzJ4 How imaginary numbers were invented: https://www.youtube.com/watch?v=cUzklzVXJwo SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 CONTENT (0:00) Complex numbers review: Addition, Multiplication (12:58) Why iota i.e. sqrt(-1) makes sense as 90 degree rotation (15:26) Intuitive proof of Euler's formula (29:25) Bonus - Further intuition behind the proof
Complex numbers tutorial [Urdu/Hindi]
#computerarchitecture #riscv Reference: Most of lecture material is derived from freely available course i.e. UC Berkeley course CS 152 https://inst.eecs.berkeley.edu/~cs152/sp12/ Single Cycle Processor (0:00) Intro (4:18) A simple processor design (22:47) RISC-V single cycle processor design Pipelining and branch prediction (1:00:00) Pipeline intro and critical path (1:09:42) Pipelining single cycle RISC-V (1:17:30) Hazards: Structural, Data & Control Hazards (1:22:33) Interocks / Stalls (1:44:06) Bypassing / Forwarding (1:51:48) Iron Law of processor performance (2:00:47) Control Hazards (2:03:18) Speculate PC+4 (2:09:54) Branch delay slots (2:15:59) Branch History Table (BHT), Branch Target Buffer (BTB) (2:49:59) Subroutine return stack (2:52:40) Interrupts Memory - Caches and VM (3:08:19) Memories overview, SRAM, DRAM (3:21:41) Cache intro. Multilevel Memory (3:38:25) Placement policy: Directly mapped, Set associative,Fully associative (3:53:00) Replacement policy, Least recently used, Random, FIFO, NLRU (3:56:50) Block size, Cache Performance (4:05:40) Write policy, Pipelined cache write, Write buffer, RAM-TAG cache (4:15:34) Multi-level cache, Inclusion policy (4:20:38) Examples Itanium-2, IBM Power 7, z196 (4:25:03) Victim Cache, Way prediction, Early restart, Non-Blocking Cache (4:31:27) Pre-fetching and Compiler Optimizations Virtual Memory System (4:46:50) Base and Bound Scheme (4:57:48) Fragmentation and Paged Memory System (5:09:27) Page table size and two level page table (5:20:13) TLB, Demand paging, Aliasing (5:45:44) Hashed page table Complex Pipelines, Superscalar, Scoreboard (5:52:20) Complex Pipelines motivation, FPUs, Memory subsytem (6:03:00) Complex In order pipeline (6:06:50) Data Hazards (RAW, WAR, WAW) (6:14:45) Scoreboard and Out of order completion (6:35:36) Tomasulo: Out of order issue and Register renaming (6:56:09) Exception and Branch issues, In order Commit (7:07:32) Unified Physical Register file (7:28:26) Memory dependencies VLIW, Loop unrolling, Software pipelining (7:41:29) Superscalar control logic scaling (7:44:23) VLIW - Very Long Instruction Word (7:48:39) Loop Unrolling & Software pipelining (8:02:02) Trace scheduling (8:10:07) Predicated execution (8:12:00) Speculative execution Multithreading, coarse and fine grained (8:14:52) Multi processing, Multi tasking, ILP and TLP (8:22:06) Fine grained multithreading (8:33:20) Coarse grained multithreading (8:39:11) Simultaneous Multithreading Vector Processors (8:51:59) Supercomputers and CDC 6600 by Seymour Cray (9:00:40) Vector Processors (9:17:50) Stripmining, Mask registers, Reductions, Scatter/Gather (9:42:40) Multimedia extensions, SIMD Synchronization and Sequential consistency (9:44:34) Symmetric Multiprocessors, Synchronization, Producer/Consumer, Mutex/Locks (10:00:30) Sequential Consistency (10:08:24) Memory Fences, Membar, Locks, Critical Section, Atomic Operations (10:15:57) Dekker's algorithm, Lamport's Bakery algorithm (10:27:45) Semaphores, Atomic Read-Modify-Writes, Test&Set, Fetch&Add, Swap (10:38:16) Non blocking Synchronization, Compare&Swap, Load Reserve & Store Conditionals Snoopy Cache, Cache Coherence (10:48:43) Sequential consistency issues, Cache coherence and Snoopy Cache (11:00:58) Snoopy cache for Multicore systems, MSI Protocol and MESI Protocol (11:22:27) Directory based cache
Computer Architecture Crash Course [Urdu/Hind]
#processor #verilog #computerarchitecture #processordesign A processor 101 intro. Gives a basic idea of assembly language, machine code and processor design from scratch. Processor code: https://github.com/yasir-javed/simple_processor Urdu video: https://www.youtube.com/watch?v=Pkq9S6vCsm0 Verilog video: https://www.youtube.com/watch?v=nblGw37Fv8A iverilog installation: https://www.youtube.com/watch?v=Y0bNVStZok4 BRAM video: https://www.youtube.com/watch?v=bJ0smcbfCY0 RISC-V Assembly book: https://github.com/johnwinans/rvalp SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 CONTENT (0:00) Intro (0:55) Building blocks and Verilog (8:44) How processor works (10:59) Instruction set (15:33) Processor hardware design (23:14) Verilog code (27:48) Processor code and demo (35:05) Making processor fancy (43:08) RISC-V instruction set
Processor design for dummies [English]
#python #pythontutorial #numpy #machinelearning #jupyternotebook Python quick tutorial, covers python basics in first 1.5 hrs. Numpy, plotting and working with images and files in next 1 hour Machine learning in 5 Hrs: https://www.youtube.com/watch?v=HGYWEOiQgWM Stanford Python tutorial link (cs231n): https://cs231n.github.io/python-numpy-tutorial/ Google Colab intro: https://www.youtube.com/watch?v=inN8seMm7UI SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 (0:00) Interpreted vs Compiled languages (1:30) Ubuntu/WSL example (8:10) Spyder/Anaconda example (10:51) Jupyter Notebook overview (19:53) Programming languages overview (32:00) Google colab intro (38:17) Python/Jupyter tutorial (43:00) Data types and operations, int, bool, string (53:54) Lists (57:16) Slicing (1:01:13) For Loops (1:04:59) List comprehensions (1:07:43) Dictionaries (1:17:12) Sets (1:22:42) Tuples (1:29:28) Functions and if/else (1:35:05) Classes (1:39:13) Numpy (1:49:22) Numpy Array indexing (2:05:30) Numpy Array maths (2:12:48) Broadcasting (2:19:28) Plotting: Matplotlib (2:24:13) Read/Display Images (2:26:42) Reading/Writing text files (2:29:13) Modules
Python/Numpy/Jupyter in 2 hrs [Urdu/Hindi]
#machinelearning #neuralnetworks #convolutionalneuralnetwork I have tried to sum up complete Machine Learning course in 5 hours in this video. In addition to topics covered in original famous Andrew Ng's Coursera course (Linear and Logistic Regression, Regularization, Neural networks, SVMs, Clustering, PCA, Recommender systems, Decision Trees) we also covered CNNs (Convolutional Neural Networks) which is part of Deep learning specialization course. A 30 lectures course becomes too big a commitment for most people. Now you can go through this shorter course instead of and fall back on specific videos if some topic is unclear, the link to course playlist is: https://www.youtube.com/watch?v=qUILAy-I204&list=PLoVsjlwzzlUT74osi5McUu7H80L6X6nzB Course Material (Slides/Assignments): https://tinyurl.com/ml-renzym Python tutorial (for doing Assignments): https://www.youtube.com/watch?v=RtHUEaF4hi8 SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 Topics timeline: (0:00) Machine learning intro (1:58) Intro: Supervised Learning (5:02) Intro: Unsupervised learning (6:33) Linear regression: Model representation (16:24) Linear regression: Cost function (23:47) Gradient descent (32:57) Briefest overview of matrices (35:07) Multiple features (42:06) Feature scaling, Mean normalization (46:53) Learning rate (49:27) Polynomial regression (53:23) Normal equation (59:22) Logistic regression/Classification (1:14:30) Multi-class classification (1:17:20) Regularization: Problem of overfitting (1:26:33) Non-linear hypothesis (1:30:22) Neurons and Model representation (1:44:19) Multi-classclassification (1:45:43) Neural network Cost function (1:47:36) Back propagation (1:59:31) Gradient checking, random initialization (2:04:48) Machine learning advice: Deciding what to do next (2:06:51) Evaluating a hypothsis (2:08:56) Model selection and training/validation/test sets (2:11:00) Diagnosing bias vs variance, Regulrization (2:14:51) Learning curves (2:18:31) Spam classification example (2:23:35) Error Analysis (2:29:22) Error metric for skewed classes, precision, recall, F-score (2:34:31) Data for machine learning (2:36:15) Fashion MNIST Tensor Flow example (2:40:14) SVM - Support vector machines (2:44:20) SVM: Maths behind large margin classifier (2:51:34) SVM: Kernels (3:04:11) Clustering (3:10:50) Dimensionality reduction: Principale Component Analysis PCA (3:26:22) Anomaly Detection (3:46:30) Recommender Systems (3:58:49) Large datasets, Stochastic/Mini-batch gradient descent, Map-reduce (4:07:20) OCR example, Sliding window, Ceiling analysis (4:17:49) Decision trees, Tree ensembles, Random Forests (4:36:09) Convolutional Neural Networks CNNs (4:45:20) CNN case studeies: LeNet-5, AlexNet, VGG-16, Resnet, Inception (4:52:40) Object Detection and Yolo quick overview (4:57:24) Face recognition/verification,
Machine Learning in 5 hrs [Urdu/Hindi]
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Topics Covered: (00:01) Last lecture Review (07:30) Priority and Unique case (16:50) Register, Posedge, Blocking/Non-Blocking Assignment (27:23) Adder, Subtractor, Multiplier (29:20) Declarations (31:02) Coding steps (37:40) Verilog Coding Example: Counter (47:00) Arrays (56:51) Verilog Simulation/Testing/Verification (1:03:40) Clock Generation, Initial block, Forever loop (1:07:01) Main Simulation, Delays using # and @(posedge clk) (1:15:21) Verilator intro and example SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
SystemVerilog Coding, Register, Adder, Multiplier, Verification, Computer Architecture Lec 03 / 30
Topics Covered: (0:00) Intro (8:40) Registers, Mux, Demux (12:49) Register file example (31:08) Decrementer Example (41:11) Four Deep FIFO design Example (52:31) SystemVerilog Coding: Module,4 (58:15) Module Instantiation (1:03:31) Gates, (1:09:32) Multiplexers/Mux, Data values (1:14:31) Demultiplexer/Demux, Concatenation SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
SystemVerilog - Modules, Gates, Mux, Demux, FIFO Example, Computer Architecture Lec 03 / 28
Topics Covered: (0:00) Adder (17:52) Subtractor (31:47) Multiplier (45:56) Flip flops (1:10:26) Review of logic design review SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
Adder, Multiplier, Flip flop, Logic design review, Computer Architecture Lec 02 / 28
Topics Covered: (0:00) Introduction to the course (6:30) Course plan (23:25) Logic Gates (32:45) Circuit for any truth table (50:46) Mux (Multiplexer) (1:00:38) Demux (Demultiplexer) (1:04:46) Comparators SUBSCRIBE! Also Enable Notifications by clickin bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1
Mux, Demux, Comparator, Logic design review and course Intro, Computer Architecture Lec 01 / 28
#imaginarynumber #complexnumbers #eular English version: https://youtu.be/OkQdJBpflr8 In this video I tried to simplify understanding of complex numbers, imaginary numbers and Eular's formula. Slides and matlab/octave code for plots: https://tinyurl.com/cmplxnos Some useful links I mentioned in talk Real Imaginative Guide to Complex Numbers: https://wirelesspi.com/a-real-imaginative-guide-to-complex-numbers/ A Quadrature Signals Tutorial: https://www.dsprelated.com/showarticle/192.php Welch Labs - Imaginary numbers are real: https://www.youtube.com/watch?v=T647CGsuOVU&list=PLiaHhY2iBX9g6KIvZ_703G3KJXapKkNaF 3Blue1Brown - Taylor Series: https://www.youtube.com/watch?v=3d6DsjIBzJ4 How imaginary numbers were invented: https://www.youtube.com/watch?v=cUzklzVXJwo SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 CONTENT (0:00) Complex numbers review: Addition, Multiplication (12:58) Why iota i.e. sqrt(-1) makes sense as 90 degree rotation (15:26) Intuitive proof of Euler's formula (29:25) Bonus - Further intuition behind the proof
Complex numbers tutorial [Urdu/Hindi]
#computerarchitecture #riscv Reference: Most of lecture material is derived from freely available course i.e. UC Berkeley course CS 152 https://inst.eecs.berkeley.edu/~cs152/sp12/ Single Cycle Processor (0:00) Intro (4:18) A simple processor design (22:47) RISC-V single cycle processor design Pipelining and branch prediction (1:00:00) Pipeline intro and critical path (1:09:42) Pipelining single cycle RISC-V (1:17:30) Hazards: Structural, Data & Control Hazards (1:22:33) Interocks / Stalls (1:44:06) Bypassing / Forwarding (1:51:48) Iron Law of processor performance (2:00:47) Control Hazards (2:03:18) Speculate PC+4 (2:09:54) Branch delay slots (2:15:59) Branch History Table (BHT), Branch Target Buffer (BTB) (2:49:59) Subroutine return stack (2:52:40) Interrupts Memory - Caches and VM (3:08:19) Memories overview, SRAM, DRAM (3:21:41) Cache intro. Multilevel Memory (3:38:25) Placement policy: Directly mapped, Set associative,Fully associative (3:53:00) Replacement policy, Least recently used, Random, FIFO, NLRU (3:56:50) Block size, Cache Performance (4:05:40) Write policy, Pipelined cache write, Write buffer, RAM-TAG cache (4:15:34) Multi-level cache, Inclusion policy (4:20:38) Examples Itanium-2, IBM Power 7, z196 (4:25:03) Victim Cache, Way prediction, Early restart, Non-Blocking Cache (4:31:27) Pre-fetching and Compiler Optimizations Virtual Memory System (4:46:50) Base and Bound Scheme (4:57:48) Fragmentation and Paged Memory System (5:09:27) Page table size and two level page table (5:20:13) TLB, Demand paging, Aliasing (5:45:44) Hashed page table Complex Pipelines, Superscalar, Scoreboard (5:52:20) Complex Pipelines motivation, FPUs, Memory subsytem (6:03:00) Complex In order pipeline (6:06:50) Data Hazards (RAW, WAR, WAW) (6:14:45) Scoreboard and Out of order completion (6:35:36) Tomasulo: Out of order issue and Register renaming (6:56:09) Exception and Branch issues, In order Commit (7:07:32) Unified Physical Register file (7:28:26) Memory dependencies VLIW, Loop unrolling, Software pipelining (7:41:29) Superscalar control logic scaling (7:44:23) VLIW - Very Long Instruction Word (7:48:39) Loop Unrolling & Software pipelining (8:02:02) Trace scheduling (8:10:07) Predicated execution (8:12:00) Speculative execution Multithreading, coarse and fine grained (8:14:52) Multi processing, Multi tasking, ILP and TLP (8:22:06) Fine grained multithreading (8:33:20) Coarse grained multithreading (8:39:11) Simultaneous Multithreading Vector Processors (8:51:59) Supercomputers and CDC 6600 by Seymour Cray (9:00:40) Vector Processors (9:17:50) Stripmining, Mask registers, Reductions, Scatter/Gather (9:42:40) Multimedia extensions, SIMD Synchronization and Sequential consistency (9:44:34) Symmetric Multiprocessors, Synchronization, Producer/Consumer, Mutex/Locks (10:00:30) Sequential Consistency (10:08:24) Memory Fences, Membar, Locks, Critical Section, Atomic Operations (10:15:57) Dekker's algorithm, Lamport's Bakery algorithm (10:27:45) Semaphores, Atomic Read-Modify-Writes, Test&Set, Fetch&Add, Swap (10:38:16) Non blocking Synchronization, Compare&Swap, Load Reserve & Store Conditionals Snoopy Cache, Cache Coherence (10:48:43) Sequential consistency issues, Cache coherence and Snoopy Cache (11:00:58) Snoopy cache for Multicore systems, MSI Protocol and MESI Protocol (11:22:27) Directory based cache
Computer Architecture Crash Course [Urdu/Hind]
#processor #verilog #computerarchitecture #processordesign A processor 101 intro. Gives a basic idea of assembly language, machine code and processor design from scratch. Processor code: https://github.com/yasir-javed/simple_processor Urdu video: https://www.youtube.com/watch?v=Pkq9S6vCsm0 Verilog video: https://www.youtube.com/watch?v=nblGw37Fv8A iverilog installation: https://www.youtube.com/watch?v=Y0bNVStZok4 BRAM video: https://www.youtube.com/watch?v=bJ0smcbfCY0 RISC-V Assembly book: https://github.com/johnwinans/rvalp SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 CONTENT (0:00) Intro (0:55) Building blocks and Verilog (8:44) How processor works (10:59) Instruction set (15:33) Processor hardware design (23:14) Verilog code (27:48) Processor code and demo (35:05) Making processor fancy (43:08) RISC-V instruction set
Processor design for dummies [English]
#python #pythontutorial #numpy #machinelearning #jupyternotebook Python quick tutorial, covers python basics in first 1.5 hrs. Numpy, plotting and working with images and files in next 1 hour Machine learning in 5 Hrs: https://www.youtube.com/watch?v=HGYWEOiQgWM Stanford Python tutorial link (cs231n): https://cs231n.github.io/python-numpy-tutorial/ Google Colab intro: https://www.youtube.com/watch?v=inN8seMm7UI SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 (0:00) Interpreted vs Compiled languages (1:30) Ubuntu/WSL example (8:10) Spyder/Anaconda example (10:51) Jupyter Notebook overview (19:53) Programming languages overview (32:00) Google colab intro (38:17) Python/Jupyter tutorial (43:00) Data types and operations, int, bool, string (53:54) Lists (57:16) Slicing (1:01:13) For Loops (1:04:59) List comprehensions (1:07:43) Dictionaries (1:17:12) Sets (1:22:42) Tuples (1:29:28) Functions and if/else (1:35:05) Classes (1:39:13) Numpy (1:49:22) Numpy Array indexing (2:05:30) Numpy Array maths (2:12:48) Broadcasting (2:19:28) Plotting: Matplotlib (2:24:13) Read/Display Images (2:26:42) Reading/Writing text files (2:29:13) Modules
Python/Numpy/Jupyter in 2 hrs [Urdu/Hindi]
#machinelearning #neuralnetworks #convolutionalneuralnetwork I have tried to sum up complete Machine Learning course in 5 hours in this video. In addition to topics covered in original famous Andrew Ng's Coursera course (Linear and Logistic Regression, Regularization, Neural networks, SVMs, Clustering, PCA, Recommender systems, Decision Trees) we also covered CNNs (Convolutional Neural Networks) which is part of Deep learning specialization course. A 30 lectures course becomes too big a commitment for most people. Now you can go through this shorter course instead of and fall back on specific videos if some topic is unclear, the link to course playlist is: https://www.youtube.com/watch?v=qUILAy-I204&list=PLoVsjlwzzlUT74osi5McUu7H80L6X6nzB Course Material (Slides/Assignments): https://tinyurl.com/ml-renzym Python tutorial (for doing Assignments): https://www.youtube.com/watch?v=RtHUEaF4hi8 SUBSCRIBE! Also Enable Notifications by clicking bell button on channel page https://www.youtube.com/c/RenzymEducation?sub_confirmation=1 Topics timeline: (0:00) Machine learning intro (1:58) Intro: Supervised Learning (5:02) Intro: Unsupervised learning (6:33) Linear regression: Model representation (16:24) Linear regression: Cost function (23:47) Gradient descent (32:57) Briefest overview of matrices (35:07) Multiple features (42:06) Feature scaling, Mean normalization (46:53) Learning rate (49:27) Polynomial regression (53:23) Normal equation (59:22) Logistic regression/Classification (1:14:30) Multi-class classification (1:17:20) Regularization: Problem of overfitting (1:26:33) Non-linear hypothesis (1:30:22) Neurons and Model representation (1:44:19) Multi-classclassification (1:45:43) Neural network Cost function (1:47:36) Back propagation (1:59:31) Gradient checking, random initialization (2:04:48) Machine learning advice: Deciding what to do next (2:06:51) Evaluating a hypothsis (2:08:56) Model selection and training/validation/test sets (2:11:00) Diagnosing bias vs variance, Regulrization (2:14:51) Learning curves (2:18:31) Spam classification example (2:23:35) Error Analysis (2:29:22) Error metric for skewed classes, precision, recall, F-score (2:34:31) Data for machine learning (2:36:15) Fashion MNIST Tensor Flow example (2:40:14) SVM - Support vector machines (2:44:20) SVM: Maths behind large margin classifier (2:51:34) SVM: Kernels (3:04:11) Clustering (3:10:50) Dimensionality reduction: Principale Component Analysis PCA (3:26:22) Anomaly Detection (3:46:30) Recommender Systems (3:58:49) Large datasets, Stochastic/Mini-batch gradient descent, Map-reduce (4:07:20) OCR example, Sliding window, Ceiling analysis (4:17:49) Decision trees, Tree ensembles, Random Forests (4:36:09) Convolutional Neural Networks CNNs (4:45:20) CNN case studeies: LeNet-5, AlexNet, VGG-16, Resnet, Inception (4:52:40) Object Detection and Yolo quick overview (4:57:24) Face recognition/verification,
Machine Learning in 5 hrs [Urdu/Hindi]
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